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    第6章_程序控制指令课件.ppt

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    第6章_程序控制指令课件.ppt

    CHAPTER 6 Program Control Instructions(程序控制指令)(P.183),6-1 THE JUMP GROUP,Unconditional JumpConditional JumpsLOOP,6-1-1 Unconditional Jump(无条件转移指令)(P.184),The unconditional jump instruction,JMP,allows the programmer to skip sections of a program and branch to any part of the memory for the next instruction.Three types of unconditional jump instructions are available to the microprocessor:Short jumpNear jumpFar jumpJumps with Register OperandsIndirect jumps Using an Index,Short jump(短转移)(P.184),FormatJMPSHORT LABELMachine language,OperationIPIPDisplacement,Notes:The short jump displacement is a distance represented by a one-byte signed number whose value ranges between+127 and 128.The short jump is an intrasegment jump that allows branches to memory locations within+127 and 128 bytes from the address following the jump.Short jump is relative program memory addressing.,1000A,10009,10008,10007,10006,10005,10004,10003,10002,10001,10000,Memory,JMP,04,CS=1000HIP=0002H,FIGURE 6-2 A short jump to four memory locations beyond the address of the next instruction,New IP=IP+04New IP=0006H,0000 33DBXORBX,BX0002 B80001START:MOVAX,10005 03C3ADDAX,BX0007 EB17JMPSHORT NEXT0020 8BD8NEXT:MOVBX,AX0022 EBDEJMPSHORT START,Machine Language,Assembly Language,Offset,Near jump(近转移)(P.185),FormatJMP(NEAR PTR)LABELMachine language,OperationIPIPDisplacement,Notes:The near jump displacement is a distance represented by a signed 16-bit number whose value ranges between+32767 and 32768.A near jump is an intrasegment jump that can jump to any memory location within the current real mode code segment.Short jump is relative program memory addressing.,1000A,10009,10008,10007,10006,10005,10004,10003,10002,10001,10000,Memory,JMP,02,FIGURE 6-3 A near jump that adds the displacement(0002H)to the contents of IP,00,0000 33DBXORBX,BX0002 B80001START:MOVAX,10005 03C3ADDAX,BX0007 E9F601JMPNEXT0200 8BD8NEXT:MOVBX,AX0202 E9FDFDJMPSTART,Offset,Machine Language,Assembly Language,Far jump(远转移)(P.186),FormatJMPFAR PTR LABELMachine language,OperationIPIP High,IP LowCSCS High,CS Low,Notes:A far jump instruction obtains a new segment and offset address to accomplish the jump.A far jump is an intersegment jump that accesses any location within the first 1M byte of memory in the real mode.A far jump is direct program memory addressing.,A3128,A3127,A3126,10004,10003,10002,10001,10000,Memory,JMP,27,FIGURE 6-4 A far jump instruction replaces the contents of both CS and IP with four bytes following the opcode.,01,00,A3,10005,EXTRN UP:FAR0000 33DBXORBX,BX0002 B80001START:MOVAX,10005 03C3ADDAX,BX0007 E9F601JMPNEXT0200 8BD8NEXT:MOVBX,AX0202EA0002-JMPFAR PTR START0207EA0000-JMPUP,Offset,Machine Language,Assembly Language,Jumps with Register Operands(带寄存器操作数的转移)(P.181),FormatJMP 16regOperationIP 16regFor example,the JMP AX instruction copies the contents of the AX register into the IP when the jump occurs.,Notes:The 16reg represents any 16-bit register except segment registers.The address of the jump is in the register specified by the jump instruction.A jump with register operand is intrasegment jump that allows a jump to any location within the current code segment.A jump with register operand is indirect program memory addressing.,Indirect jumps Using an Index(使用变址的间接转移)(P.188),The indirect jumps using an index use the form of addressing to directly access the jump table.The assembler assumes that the jump is near unless the FAR PTR directive indicates a far jump instruction.,TABLE 3-10 Examples of indirect program memory addressing,EXAMPLE 6-5.MODELSMALL;select SMALL model.DATA;start of DATA segmentTABLEDWONE;lookup tableDWTWODWTHREE.CODE;start of CODE segment.STARTUPTOP:MOVAH,1;read key to ALINT21HMOVSI,0SUBAL,31H;test for below 1JBTOP;if below 1CMPAL,2JATOP;if above 3MOVSI,0MOVAH,0;calculate table addressADDSI,AXJMPTABLESI;jump to ONE,TWO,or THREE,ONE:MOVDL,1;load DL with 1JMPBOTTWO:MOVDL,2;load DL with 2JMPBOTTHREE:MOVDL,3;load DL with 3BOT:MOVAH,2;display ONE,TWO,or THREEINT21H.EXIT;exit to DOSEND;end of file,NOTE:TABLEDWONE;lookup tableDWTWODWTHREEJMPTABLE SI;IP(TABLE+SI+1,TABLE+SI),6-1-2 Conditional Jumps(条件转移)(P.189),The conditional jump instructions test the following flag bits:sign(S),zero(Z),carry(C),parity(P),and overflow(O).If the condition under test is true,a branch to the label associated with the jump instruction occurs.If the condition is false,the next sequential step in the program executes.For example,a JC will jump if the carry bit is set.,Conditional jump instructions are always short jumps in the 8086 microprocessor.Conditional jump instructions often follow the CMP or TEST instruction.Table 6-1 lists all the conditional jump instructions with their test conditions.,TABLE 6-1 Conditional jump instructions,TABLE 6-1 Conditional jump instructions(continued),FIGURE 6-5 Signed and unsigned numbers follow different orders,6-1-3 LOOP(P.186),FormatLOOP LABELOperationLOOP decrements CX;if CX0,it jumps to the address indicated by the label;If CX becomes a 0,the next sequential instruction executes.Compare the following instructions:LOOPLABELDECCXJNZLABEL,EXAMPLE 6-6;A program that sums the contents of BLOCK1 and BLOCK2;and stores the results over top of the data in BLOCK2.MODEL SMALL;select SMALL model.DATA;start of DATA segmentBLOCK1DW100 DUP(?);100 bytes for BLOCK1 BLOCK2DW100 DUP(?);100 bytes for BLOCK2.CODE;start of CODE segment.STARTUP;start of programMOVAX,DS;overlap DS and ESMOVES,AXCLD;select incrementMOVCX,100;load count of 100MOVSI,OFFSET BLOCK1;address BLOCK1MOVDI,OFFSET BLOCK2;address BLOCK2L1:LODSW;load AX with BLOCK1ADDAX,ES:DI;add BLOCK2 data to AXSTOSW;stare sum in BLOCK2LOOP L1;repeat 100 times.EXIT;exit to DOSEND;end of file,Conditional LOOPS,LOOPE/LOOPZ(loop while equal)Format:LOOPE/LOOPZ LABELOperation:LOOP decrements CX;The LOOPE/LOOPZ instruction jumps to LABEL if CX0 while an equal condition exists;It will exit the loop if the condition is not equal or if the CX register decrements to 0.,LOOPE/LOOPZ(loop while not equal)Format:LOOPNE/LOOPNZ LABELOperation:LOOP decrements CX;The LOOPNE/LOOPNZ instruction jumps to LABEL if CX0 while an not-equal condition exists;It will exit the loop if the condition is equal or if the CX register decrements to 0.,6-3 PROCEDUES(过程)(P.200),The procedure(subroutine)is a group of instructions that usually performs one task.A procedure is a reusable section of the software that is stored in once,but used as often as necessary.The CALL instruction links to the procedure,and the RET instruction returns from the procedure.The stack stores the return address(the address of the instruction following the CALL)whenever a procedure is called during the execution of a program.The CALL instruction pushes the return address on the stack.The RET instruction removes the return address from the stack to the program returns to the instruction following the CALL.,Procedure Definition,FormatNAMEPROCNEAR/FARRETNAMEENDP,6-3-1 CALL(P.201),Near CALLFar CALLCALLs with Register OperandsCALLs with Indirect Memory Addresses,Near CALL(近CALL)(P.201),FormatCALL NAMEMachine Language,OperationSS:SP-1,SS:SP-2=IP;SPSP2IPIP+DisplacementNote:The procedure is near type.The near CALL is relative intrasegment call.,AFFFF,AFFFE,AFFFD,10004,10003,10002,10001,10000,Memory,CALL,FF,FIGURE 6-6 The effect of a near CALL on the stack and the instruction pointer,0F,Near CALL,Stack,(Procedure),11002,11003,Far CALL(远CALL)(P.201),FormatCALL NAMEMachine Language,OperationSS:SP-1,SS:SP-2=CS;SPSP2SS:SP-1,SS:SP-2=IP;SPSP2CSNew CS;IPNew IPNote:The procedure is far type.The near CALL is direct intersegment addressing.,AFFFF,AFFFE,AFFFD,10004,10003,10002,10001,10000,Memory,CALL,02,00,Far CALL,Stack,(过程),11002,11003,00,11,AFFFB,AFFFC,FIGURE 6-6 The effect of a far CALL instruction,CALLs with Register Operands(带有寄存器操作数的CALL)(P.202),FormatCALL 16regOperationSS:SP-1,SS:SP-2=IP;SPSP2IP16regNoteThe 16reg represents any 16-bit register except the segment registers.The CALL with register operand is indirect intersegment addressing.An example is the CALL BX instruction,which pushes the contents of IP onto the stack.It then jumps to the offset address,located in register BX,in the current code segment.,CALLs with Indirect Memory Addresses(用间接存储器寻址的CALL)(P.203),The CALLs with Indirect Memory Addresses replace the contents of IP or/and CS with the one word or two words in memory location that can be indirectly accessed with register.Example,CALLWORD PTR BX;(SP+1,SP)IP,SP SP-2;IP(BX+1,BX),CALLDWORD PTR VAR-NAME SI;(SP+1,SP)CS,SP SP-2;(SP+1,SP)IP,SP SP-2;IP(VAR-NAME+SI+1,VAR-NAME+SI);CS(VAR-NAME+SI+3,VAR-NAME+SI+2),6-3-2 RET(过程返回)(P.204),RET without Immediate OperandRET with Immediate Operand,RET without Immediate Operand(不带立即操作数的过程返回指令),FormatRETOperationFor the near return(the procedure is near type),IP(SP+1,SP),SPSP2.For the far return(the procedure is far type),IP(SP+1,SP),SPSP2;CS(SP+1,SP),SPSP2;A RET instruction partners with a CALL instruction.The CALL instruction links to the procedure,and the RET instruction returns from the procedure.,IP before CALL=0003H,AFFFF,10004,10003,10002,10001,10000,Memory,CALL,FF,FIGURE 6-8 The effect of a near return instruction on the stack and instruction pointer,0F,Near CALL,Stack,RET,11002,11003,(Return here),AFFFD,AFFFE,AFFFC,SP before CALL=0FFFFHSS before CALL=0A000H,11004,RET with Immediate Operand(带立即操作数的过程返回指令),FormatRETnOperationFor the near return(the procedure is near type),IP(SP+1,SP),SPSP2,SPSPn.For the far return(the procedure is far type),IP(SP+1,SP),SPSP2;CS(SP+1,SP),SPSP2 SPSPn;A RET with immediate operand release n memory locations after RET executes.The immediate operand n must be even.,6-4 INTRODUCTION TO INTERRUPTS(中断介绍)(P.205),An interrupt is a procedure that interrupts whatever program is currently executing.When an interrupt occur,it is responded by calling an interrupt service procedure.,The purpose of Interrupt(中断的目的)(P.458),Main program,FIGURE 12-1 A time line that indicates interrupt usagein a typical system,The 8086/8088 microprocessor can process 256 different interrupt that are numbered from 0 to 255.There are two interrupt group.A hardware-generated interrupt is externally derived from a hardware signal.A software-generated interrupt is internally derived from the execution of an instruction or by some internal event.,Interrupt Vector(中断向量)(P.205),An interrupt vector is the starting address of an interrupt service procedure.An interrupt vector contain a value for IP and CS that forms the address of the interrupt service procedure.The first two bytes contain the IP,and the last two bytes contain the CS.There are 256 different interrupt vector stored in the first 1024 bytes of the memory(00000H003FFH)(the vector table)when the microprocessor operates in the real mode.,TABLE 6-4 Interrupt vector of 8086,Note:The address of the interrupt vector is determined by multiplying the interrupt type number times 4.,Interrupt Instructions(中断指令)(P.206),In the real mode,each of these instructions fetches a vector from the vector table,and then calls the procedure stored at the location addressed by the vector.INT nINT3INTO,INT n,FormatINTnNotesThe numeric operand n is the interrupt type number whose range is 0 to 255(00HFFH).An INT n instruction is two bytes long.,Operation:The contents of the flag register are pushed onto the stack.Both the IF and TF are cleared.The contents of the CS are pushed onto the stack.,The contents of the IP are pushed onto the stack.The interrupt vector contents are fetched,and then placed into both IP and CS.,AFFFD,AFFFC,AFFFB,00203,00202,11001,11000,Memory,0CDH,80H,INT 80H,FLAGS,Stack segment,AFFFA,AFFF9,00H,00200,00201,00H,00H,10H,Interrupt vector,AFFF8,AFFF7,AFFF6,AFFF5,AFFF4,50H,10000,Code segment,55H,ECH,10001,10002,(Procedure),INT 3,FormatINT 3NotesAn INT 3 instruction is a special software interrupt designed to function as a breakpoint.An INT 3 is a one-byte instruction.,INTO,FormatINTOOperationIf O=0,the INTO instruction performs no operation.If O=1 and INTO instruction executes,an interrupt occurs via vector type number 4.,Interrupt on overflow,An INTO is a one-byte instruction.The INTO instruction appears in software that adds or subtracts signed binary numbers.,IRET(中断返回)(P.207),FormatIRETOperationPop stack data back into the IP.Pop stack data back into the CS.Pop stack data back into the flag register.NoteThe IRET is used only with software or hardware interrupt service procedures.,EXAMPLE 6-20,INTSPROCFARADDAX,BXADDAX,BPADDAX,DIADDAX,SIIRETINTSENDP,AFFFD,AFFFC,AFFFB,11001,11000,Memory,0CDH,80H,INT 80H,Stack segment,AFFFA,AFFF9,10H,00H,10H,02H,00H,01H,AFFF8,AFFF7,AFFF6,AFFF5,AFFF4,1020D,Code segment,CFH,1020E,1020F,IRET,11002,(Procedure),Interrupt Control(中断控制)(P.208),Set interrupt flag instructionFormat:STIOperation:IF1Clear interrupt flag instructionFormat:CLIOperation:IF0,TABLE 6-5(P.209)DOS Function Calls(P.780)EXAMPLE A-6MOVAH,6;load function 06HMOVDL,A;select letter AINT21H;call DOS function,6-5 MACHINE CONTROL AND MISCELLANEOUS INSTRUCTIONS(机器控制及杂项指令)(P.209),Controlling the Carry Flag Bit(控制进位标志位)(P.210),Set CarryFormat:STCOperation:CF1Clear CarryFormat:CLCOperation:CF0,Controlling the Direction Flag Bit(控制方向标志位)(P.121),Set DirectionFormat:STDOperation:DF1Clear DirectionFormat:CLDOperation:DF0,WAIT(P.210),FormatWAITOperationThe WAIT instruction monitors the hardware TEST pin on the 8086/8088.If the WAIT instruction executes while the TEST=0,nothing happens and the next instruction executes.If the TEST pin=1 when the WAIT instruction executes,the microprocessor waits for the TEST pin to return to a logic 0.,HLT(P.210),FormatHLTOperationThe halt instruction(HLT)strops the execution of software.NoteThere are three ways to exit a halt:by an interrupt,by a hardware reset or during a DMA operation.,NOP(P.210),FormatNOPOperationIf the NOP instruction executes,nothing happens.NoteAn NOP takes the 8086/8088 microprocessor three clocks to execute.It usually applied in time delays to waste time.,LOCK Prefix and ESC(P.210),LOCK PrefixThe LOCK prefix appends an instruction and cause the LOCK pin to become a logic 0 during the instruction execution.For example,the LOCK:MOV AL,SI instruction is a locked instruction.ESCThe escape(ESC)instruction passes information to the 8087Pentium II numeric coprocessors.,

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